United States Department of Commerce (DOC)

Institutionally Coordinated - Limit: 1* // Available: 0

D. Moseke

The submission for this funding program is coordinated by the Center for Semiconductor Manufacturing.Please contact Dan Moseke, Project Director, for more information.

The 2022 CHIPS and Science Act appropriated $50 billion to the U.S. Department of Commerce’s (the Department or DOC) CHIPS for America program to strengthen semiconductor manufacturing in the United States. This amount includes $39 billion for the Department to onshore semiconductor manufacturing through an incentives program and $11 billion to advance U.S. leadership in semiconductor research and development (R&D). These R&D advances will primarily be realized through the following four programs: the CHIPS National Semiconductor Technology Center (NSTC), the CHIPS National Advanced Packaging Manufacturing Program (NAPMP), the CHIPS Metrology Program, and the CHIPS Manufacturing USA Program (MFG USA). These investments, across both the R&D and incentives programs, seek to strengthen U.S. competitiveness, support domestic production and innovation, create good jobs across the country—with working conditions consistent with the Good Jobs Principles published by the Department of Commerce and the U.S. Department of Labor—and advance U.S. economic and national security.

The CARISSMA program will complement these efforts by generating or enhancing sustainable semiconductor materials and processes. Research outputs should prove relevant and translatable to industry, the NSTC, the CHIPS Manufacturing USA Program, and other CHIPS programs. The competition should further enhance participation in and availability of academic-industry partnerships and research infrastructure for CHIPS Act funded activities and the development of a thriving semiconductor-related AI/AE talent pool.

Eligibility 
Under this NOFO, eligible applicants are domestic accredited institutions of higher education and domestic non-profit or for-profit organizations that manage consortia of accredited institutions of higher education. A domestic entity is one that is incorporated within the United States (including a U.S. territory) with its principal place of business in the United State (including a U.S. territory). Eligible applicants may submit only one concept paper and, if invited, one full application.

Institutionally Coordinated Limit: 5* // Available: 5

The submission for this funding program is coordinated by the Center for Semiconductor Manufacturing.Please contact Dan Moseke, Project Director, for more information.

Applications such as high performance computing and lowpower electronics, both needed for artificial intelligence (AI), require leap-ahead advances in semiconductor advanced packaging. This Notice of Funding Opportunity (NOFO) seeks proposals for R&D activities that will establish and accelerate domestic semiconductor advanced packaging through investments in five (5) R&D Areas: (1) Equipment, Tools, Processes, and Process Integration; (2) Power Delivery and Thermal Management; (3) Connector Technology, including Photonics and Radio Frequency (RF); (4) Chiplets Ecosystem; and (5) Co-design/Electronic Design Automation (EDA).

The submission of a concept paper is required. Eligible applicants may submit only one concept paper per R&D Area. Each concept paper may only include one R&D Area. Applicants may submit separate concept papers on different R&D Areas.

1 Ticket / 0 Available

Angela Cruze (Inst Future Data Computation)

This Notice of Funding Opportunity solicits applications for the Digital Equity Competitive Grant Program (“Competitive Grant Program” or “Program”), the third of three digital equity programs authorized by the Infrastructure Investment and Jobs Act of 2021, Division F, Title III, Public Law 117-58, 135 Stat. 429, 1209 (November 15, 2021) (“Infrastructure Act”) also known as the (“Digital Equity Act” or “DE Act”). The Digital Equity Act appropriated $2.75 billion to be awarded by the Assistant Secretary of Commerce for Communications and Information (“Assistant Secretary”) to promote digital equity and inclusion.

The Digital Equity Act consists of three funding programs:

1. the $60 million State Digital Equity Planning Grant Program;
2. the $1.44 billion State Digital Equity Capacity Grant Program; and
3. the $1.25 billion Competitive Grant Program.

The Digital Equity Planning Grant Program was launched in May of 2022 and is now complete. Under the Planning Grant Program, 56 States and U.S. Territories created Digital Equity Plans that identified the barriers to digital equity faced by certain populations defined by the statute (i.e., “Covered Populations”)1 and measurable objectives for addressing those barriers. The State Digital Equity Capacity Grant Program Notice of Funding Opportunity was released on March 29, 2024, and will provide funds to States and U.S. Territories to implement the Digital Equity Plans created through the Digital Equity Planning Grant Program, as well as provide funds for Indian Tribes, Alaska Native entities, and Native Hawaiian organizations (“Native Entities”) to address the digital equity needs of the Covered Populations within those communities. The Capacity Grant Program is on-going and will continue to address the needs of the Covered Populations as identified in the State and U.S. Territories’ Digital Equity Plans and as identified by Native Entities.

The Competitive Grant Program will make funds available to a wide range of entities to address barriers to digital equity faced by Covered Populations as defined by 47 U.S.C. §1721(8). The Competitive Grant Program will support efforts to achieve digital equity, promote digital inclusion activities, and spur greater adoption and meaningful use of broadband among the Covered Populations. Specifically, the Digital Equity Act authorizes funds to be used for the development and implementation of digital inclusion activities that benefit the Covered Populations; programs that facilitate the adoption of broadband by Covered Populations to provide educational and employment opportunities; training programs that cover basic, advanced, and applied skills; workforce development programs; access to equipment, instrumentation, networking capability, hardware and software, or digital network technology for broadband services at low or no cost; and the construction or operation of public access computing centers for Covered Populations. Awards will focus on addressing the needs of the Covered Populations not met by the Capacity Grant Program and will strive for a diverse pool of recipients. To ensure funds are directed to the most effective programs with the greatest reach, and to minimize administrative overhead, NTIA encourages proposals that demonstrate a broad partnership of entities with the ability to administer significant resources and address the varied concerns of the Covered Populations.

Submit ticket request  // Limit: 4* // Tickets Available: 4

*Each applicant may submit a maximum of one SRFA 1 application and three SRFA 2 applications.

This NOFO is the second in a series that NTIA will issue and administer under the Public Wireless Supply Chain Innovation Fund (Innovation Fund). This NOFO is divided into two topic areas: open radio unit (RU) commercialization and open RU innovation. Throughout this document, open RU commercialization is referred to as “specific research focus area 1” (SRFA 1) and open RU innovation is referred to as “specific research focus area 2” (SRFA 2). A brief description of each SRFA is below:
 

• SRFA 1: Accelerating the development of open RU products to the point where they meet carrier needs and are ready for commercial trials; and
• SRFA 2: Improving the overall performance and capabilities of open RUs through targeted research and development.

Applications in response to this NOFO must address either SRFA 1 or SRFA 2. A single application cannot address both SRFAs. If an application is submitted addressing both SRFAs, it will be rejected. Applicants interested in applying for both SRFAs must submit a separate application for each SRFA. Applicants may only include one project per application, regardless of SRFA. Individual submissions containing multiple proposed projects will be rejected. Each applicant may submit a maximum of one SRFA 1 application and three SRFA 2 applications. Each SRFA 2 application must address at least one, and may address more than one, topic area listed in Section 3.3.1.

NTIA will award up to $420,000,000 under this NOFO. The amount of funding NTIA expects to award per project differs by SRFA, as follows:
• SRFA 1: NTIA expects to award $25,000,000-$45,000,000 per project.
• SRFA 2: NTIA expects to award $5,000,000-$10,000,000 per project.

Institutionally Coordinated // Limit: 1 // L. Folks (Semiconductor Strategy)

Please contact the Center for Semiconductor Manufacturing (CSM)  for more information. 

Eligible applicants can only submit one concept plan paper under this NOFO.

Program Priorities

“Advanced packaging” refers to many chips with diverse functions assembled tightly together on a substrate in two or three dimensions at extremely fine dimensions. This method achieves function, performance, and power savings far greater than can be achieved with conventionally packaged chips on a printed circuit board. Recent advances in artificial intelligence, for example, would not be possible without advanced packaging.

Advanced packaging can be a transformative capability that helps U.S. manufacturers compete globally, but there are many technological challenges to solve. The CHIPS Research and Development Office has established the CHIPS National Advanced Packaging Manufacturing Program to address these challenges, including:

• How do we design and assemble chips so tightly that they behave like a single traditional large chip, but with the production efficiency and cost savings of advanced packaging?

• How do we supply power to and dissipate heat from such tightly coupled assemblies?

• How do we test and repair such complex assemblies?

• How do we ensure their reliability since traditional methods of visual inspection cannot be performed on such small, tightly packaged dimensions?

The CHIPS NAPMP will enable the development of a robust domestic advanced packaging ecosystem by:

• Establishing an advanced packaging piloting facility (or facilities) that accelerates the transfer of innovations in packaging, equipment, and process development into manufacturing;

• Driving the development of digital tools to reduce the time and cost of advanced packaging engineering; and,

• Establishing and supporting partnerships among industry, academia and training entities, and government to contribute to an advanced packaging workforce.

The six priority research investment areas of the CHIPS NAPMP are:

• Materials and substrates

• Equipment, tools, and processes

• Power delivery and thermal management for advanced packaging assemblies

• Photonics and connectors that communicate with the outside world

• A chiplet ecosystem

• Co-design of multi-chiplet systems with automated tools